Field of the Invention
The present invention relates to a separation apparatus, and in particular relates to a separation apparatus for separate a cap layer from a chip package and a method for separating a cap layer from a chip package by means of the separation apparatus.
Description of the Related Art
The chip package process is an important process during the fabrication of an electronic product. Chip packages not only protect the chips therein from outer environmental contaminants, but also provide electrical connection paths between electronic elements inside and outside of the chip packages.
A conventional chip package having sensing functions, such as a fingerprint-recognition chip package, is easily contaminated or damaged during the manufacturing process and results in decreasing both the yield and liability of conventional chip package having sensing functions. In order to meet the tendency of size-miniaturization of electronic components, it is an import subject to minimize the thickness of a substrate for carrying a semiconductor chip to be packaged. However, if a thin substrate for carrying a semiconductor chip to be packaged is utilized, the yield will be reduced owing to the thin substrate is bended or damaged during the package process.
In order to resolved above-mentioned drawbacks, a so-called small leadless package technology (SLP) was disclosed. The SLP is characterized by adjoined a reinforced plate (cap layer) on the bottom side of the thin substrate carrying a semiconductor chip to be packaged on the top side to overcome the drawbacks of the substrate bended or damaged during the package process. The reinforced plate (cap layer) will be removed by separating it from the substrate after the thin substrate is molded. However, the bonding force between the thin substrate and the semiconductor chip is very strong, the wires on the thin substrate might be easily damaged during the step of separating the reinforce plate (cap layer) from the thin substrate.
Therefore, a new method for separating the reinforced plate (cap layer) from a SLP chip package without damaging the wires on the think substrate is desired.